How are Microchips Made? đ„ïžđ ïž CPU Manufacturing Process Steps
Summary
TLDRThis video script offers an in-depth exploration of microchip manufacturing, detailing the complex process of creating billions of transistors on a tiny chip. It delves into the semiconductor fabrication plant's operations, where silicon wafers undergo around a thousand processes over three months. The script explains the use of high-tech tools, the importance of cleanrooms, and the meticulous steps involved in building layers of metal interconnects and transistors. It also touches on the post-manufacturing testing and categorization of CPUs, providing a comprehensive look at the technology behind our modern devices.
Takeaways
- đ± A single smartphone can contain 62 microchips with a total of 90 billion transistors, showcasing the high density of modern technology.
- đ Microchips are manufactured in semiconductor fabrication plants, which are vast facilities with clean rooms spanning areas equivalent to 8 football fields.
- đ° The machines in these plants are extremely expensive, ranging from a few million to 170 million dollars each, reflecting the high cost of microchip production.
- âïž The production process involves around a thousand steps over a 3-month period, highlighting the complexity and time-consuming nature of microchip manufacturing.
- đŹ Each silicon wafer can be covered in hundreds of CPU chips, each containing 26 billion transistors, indicating the scale of integration in modern chips.
- đ The transistors are incredibly small, with FinFETs having dimensions of 36 by 6 by 52 nanometers, emphasizing the nanoscopic precision required.
- đ The manufacturing process includes 80 different layers of patterns, each requiring a separate photomask, which are costly and crucial for the design transfer.
- đ ïž There are six main groups of semiconductor tools: mask layer creation, material addition, material removal, material modification, wafer cleaning, and wafer inspection.
- đŹ Ion implanters are used to modify the silicon by adding dopants to create P and N regions for transistors, and they are a key part of the front-end manufacturing process.
- đ§Œ Cleaning and inspection steps are frequent to ensure the wafer's cleanliness and to check for defects, which is critical for the quality of the final product.
- đ The video script took over 1300 hours to create, demonstrating the extensive effort behind producing educational content on complex topics like microchip fabrication.
Q & A
How many microchips are inside the smartphone mentioned in the script?
-There are 62 microchips inside the smartphone.
What is the total number of transistors contained in the microchips of the smartphone?
-The microchips contain a total of 90 billion transistors.
What is the size of a clean room in a semiconductor fabrication plant as described in the script?
-The clean room in a semiconductor fabrication plant spans the area of 8 football fields.
How much does a single machine in the semiconductor fabrication plant cost?
-The cost of a single machine in the semiconductor fabrication plant ranges from a few million to 170 million dollars.
How many processes does a silicon wafer undergo in the microchip manufacturing process?
-A silicon wafer undergoes around a thousand processes in the microchip manufacturing process.
What is the number of CPU chips that can fit on a 300-millimeter silicon wafer?
-A 300-millimeter silicon wafer can fit 230 CPU chips.
How many billions of transistors does each CPU chip contain?
-Each CPU chip contains 26 billion transistors.
How many nanometers are the channel dimensions of the FinFETs transistors mentioned in the script?
-The channel dimensions of the FinFETs transistors are 36 by 6 by 52 nanometers.
What is the total number of metal layers of wires in the CPU described in the script?
-There are a total of 17 metal layers of wires in the CPU.
How many process steps are there in the sequence to build all the 80 layers of the die?
-To build all the 80 layers of the die, there are 940 process steps.
What is the purpose of the cleaning and inspection steps in the microchip manufacturing process?
-The purpose of the cleaning and inspection steps in the microchip manufacturing process is to remove any stray particles that may have fallen onto the wafer and to ensure that each of the processes is being executed with nanometer-level precision.
Outlines
đ± Microchip Manufacturing Overview
This paragraph introduces the complexity and scale of microchip manufacturing. It reveals that a single smartphone can contain 62 microchips with a total of 90 billion transistors. The manufacturing process occurs in a semiconductor fabrication plant, which is a vast, clean environment filled with expensive machinery. The process involves around a thousand steps over a 3-month period, resulting in silicon wafers covered in hundreds of CPU chips, each with billions of transistors. The video promises to explore this intricate process, including the nanoscopic transistors and the complex 3D wiring.
đ Inside the Microchip Factory
The second paragraph delves into the analogy of microchip manufacturing to baking an 80-layer cake with precise requirements. It outlines the steps to create a single layer of an integrated circuit, starting with the deposition of insulating silicon dioxide and photoresist, followed by patterning with UV light and etching. The paragraph emphasizes the complexity and precision required, with 940 steps repeated to build all layers. It also introduces the semiconductor fabrication plant's operations, including the transportation of silicon wafers and the use of various tools, each performing a specific process step.
đ ïž Semiconductor Tools and Their Functions
This paragraph discusses the different types of semiconductor tools used in the fabrication process, categorized by their functions. It explains the role of each tool group, such as creating mask layers, adding or removing materials, modifying the silicon, cleaning the wafers, and inspecting for defects. The paragraph provides a detailed look at the photolithography tool, which is crucial for transferring designs onto the wafer. It also touches on the variety of deposition tools and their role in adding materials to the wafer based on the mask layer.
đŹ Detailed Process of Wafer Processing
The fourth paragraph focuses on the detailed process of how semiconductor tools process the wafer to create a single metal interconnect layer. It describes the steps of insulating layer deposition, photoresist application, photolithography, etching, and chemical mechanical planarization (CMP). The paragraph also highlights the importance of cleaning and inspection steps to ensure the quality of the integrated circuit. Additionally, it mentions the complexity of fabricating FinFET transistors and the need for additional steps not covered in the summary.
đ Behind the Scenes of Microchip Manufacturing
This paragraph provides insight into the efforts behind creating the video, including the extensive research, modeling, scripting, and animation that took over 1300 hours. It emphasizes the secrecy surrounding the semiconductor industry's processes and tools. The paragraph also discusses the additional steps in microchip manufacturing, such as silicon wafer production and post-fabrication testing. It concludes with a call to action for viewers to support the creators through likes, subscriptions, and Patreon, and mentions the sponsor, Brilliant.org, which offers educational resources on various technology topics.
đ Learning Resources and Future Content
The final paragraph promotes Brilliant.org as a learning resource for complex technology concepts, including AI and large language models. It mentions a specific course on technology that covers topics like GPS, computer memory, and recommendation algorithms. The paragraph also discusses the creators' plans for future videos on microchip fabrication, transistor physics, GPUs, and CPU architecture. It expresses gratitude to supporters and sponsors and encourages viewers to subscribe for updates on new content.
Mindmap
Keywords
đĄMicrochips
đĄTransistors
đĄSemiconductor Fabrication Plant
đĄClean Room
đĄSilicon Wafers
đĄIntegrated Circuit
đĄPhotolithography
đĄFinFET
đĄIon Implantation
đĄChemical Mechanical Planarization (CMP)
đĄMetrology Tools
Highlights
A smartphone contains 62 microchips with a total of 90 billion transistors.
Microchips are manufactured in semiconductor fabrication plants with clean rooms spanning the area of 8 football fields.
Silicon wafers undergo around a thousand processes over a 3-month period in the fabrication process.
Each silicon wafer ends up covered in hundreds of CPU chips, each containing 26 billion transistors.
The nanoscopic transistors and layers of wires form an integrated circuit that is cut, tested, and packaged for use in computers.
A CPU chip has 24 cores, a memory controller, a graphics processor, and other sections, with 44,000 transistors in a single multiply block.
Transistors are incredibly small, with FinFETs having channel dimensions of 36 by 6 by 52 nanometers.
The manufacturing process is compared to baking an 80-layer cake with unique shapes and 940 steps, taking 3 months to complete.
A single layer of the integrated circuit involves depositing insulating silicon dioxide, applying photoresist, and using UV light for patterning.
The semiconductor fabrication plant uses a variety of machines, each costing between a few million to 170 million dollars.
Silicon wafers are transported in a cleanroom using a front opening universal pod (foup) and an overhead transport system.
The fabrication plant has 435 semiconductor tools that can produce 50,000 wafers or 11.5 million CPUs a month.
Semiconductor tools are categorized into six groups: making the mask layer, adding material, removing material, modifying the material, cleaning the wafer, and inspecting the wafer.
Photolithography tools use UV light and photomasks to transfer designs onto wafers for nanoscopic patterning.
Deposition tools add materials like metals, insulators, and crystalline layers of silicon onto the wafer using a mask layer.
Etching and chemical mechanical planarization (CMP) are used to remove material and ensure a flat wafer surface for additional layers.
Ion implanters modify the silicon by bombarding it with elements like phosphor or boron to form the transistors.
Wafer washers clean the wafer to remove contaminants, and metrology tools inspect for defects with nanometer-level resolution.
The manufacturing process of a single metal interconnect layer involves multiple steps, including deposition, etching, and planarization.
The video's creation took over 1300 hours of research, modeling, scripting, and animation to provide detailed insights into microchip manufacturing.
The video is sponsored by Brilliant.org, which offers interactive learning modules on various scientific and technological topics.
Transcripts
Inside this smartphone are 62 microchips containing a total of 90 billion transistors. Â
These microchips are incredibly powerful and the cornerstone of all technology, but how are Â
billions of nanoscopic transistors manufactured into a microchip the size of a tiny ant?Â
Well, all these microchips were manufactured in a semiconductor fabrication plant like this one. Â
Inside it is a clean room which spans the area of 8 football fields and is filled with hundreds of Â
machines ranging in size from that of a van to that of a city bus and costing anywhere between Â
a few million and 170 million dollars. Within this microchip factory, silicon wafers travel Â
from machine to machine and undergo around a thousand processes over a 3-month period. And, Â
by the end of production, each silicon wafer will be covered in hundreds of CPU chips Â
each containing 26 billion transistors. When we zoom in we can see the nanoscopic Â
transistors at the bottom and over a dozen layers of wires above. This Â
integrated circuit is then cut out from the wafer, tested, and packaged so that Â
it can be installed into your desktop computer. In this video weâre going to explore the entire Â
microchip manufacturing process and show you how billions of nanoscopic transistors Â
and an impossibly complex 3D maze of wires are manufactured in one of the worldâs most Â
technologically advanced microchip factories. Itâs an incredibly complicated process, Â
so stick around and letâs jump right in! A portion of this video is sponsored by Brilliant.org.Â
There are two sides to understanding how microchip manufacturing works. The first is the sequence of Â
steps and processes needed to build the nanoscopic transistors and the labyrinth of wires. Whereas Â
the second is how the semiconductor fab and multimillion dollar equipment on the cleanroom Â
floor work, and weâll be flipping between these two sides to get a complete picture.Â
Letâs start by opening up this desktop computer, focusing on the CPU and taking a look at whatâs Â
inside. Here we have an integrated circuit, or die, which weâll refer to as a chip. This chip Â
has 24 cores, a memory controller, a graphics processor, and many other sections. Within one Â
of the cores, we can see its block diagram and the various elements. Zooming in on Â
this multiply block, we find a layout of 44 thousand transistors that physically execute Â
32-bit multiplication and constitute just point zero zero zero one seven percent of the Â
overall 26 billion transistors in the CPU. Zooming in even further, we see layers of Â
metal wires, or interconnects, and at the very bottom are the transistors that form the basic Â
logic gates. Note that these layers of metal interconnects arenât floating, but rather, Â
the empty space that you see is filled with insulating materials, thus providing structure, Â
and preventing the metal wire layers from touching. Furthermore, here weâre only showing Â
the transistors at the bottom and five layers of metal interconnects with vias traveling vertically Â
between the layers. In actuality there are a total of 17 metal layers of wires in the CPU, Â
and each successive set of levels uses larger and larger interconnects. At the bottom are Â
local interconnects that move data around this 32 bit multiply circuit. In the middle are Â
intermediate interconnects that move data around the core, and at the top are global interconnects Â
that move data around the entire CPU. You might be wondering how small are Â
these transistors? Zooming in again and past the interconnect layers we find FinFets, Â
which are transistors whose channel dimensions are 36 by 6 by 52 nanometers with a transistor Â
to transistor pitch of 57 nanometers. Clearly the transistors are incredibly small. Hereâs Â
a mitochondria, a dust particle, and a human hair for size comparisons.Â
Now that you have a sense of what the transistors and labyrinth of metal interconnects look like, Â
letâs explore how theyâre manufactured. Weâll begin with an analogy. Imagine baking Â
a cake thatâs 80 layers tall, with each layer cut to a unique shape. To make this cake there are Â
940 steps in the recipe, which takes 3 months to complete and includes hundreds of exotic Â
ingredients. And, if any measurement, baking time, or temperature is more than one percent off, Â
then the cake is entirely ruined. Thatâs kind of what itâs like to make a microchip, Â
but microchips are even more complicated. Letâs look at a single layer of this integrated Â
circuit and run through a simplified set of steps used to build it. To start, Â
a layer of insulating silicon dioxide is deposited on top of the wafer and then a layer of light Â
sensitive photoresist is spread across the top. Next, using UV Light and a stencil, a pattern is Â
applied to the photoresist. Solvents then are used to remove the areas hit by the UV light, Â
thus creating a patterned mask layer. Using the mask, the revealed silicon dioxide is etched away Â
down to the previous layer. Next the mask layer is removed, and a layer of copper is added to cover Â
the wafer and fill in the areas that were just etched away. Finally, the surface is ground down Â
and leveled off to reveal the copper and insulator patterns. And thus, a single layer is completed.Â
In order to build the next layer, which is a vertical set of metal vias, we repeat the Â
same set of steps, but use a different pattern for the photomask. Since these layers are all Â
built using the same set of steps itâs more effective to visualize the steps as a circle Â
like a clock. To build all the 80 layers of the die, this sequence is repeated over and over, Â
resulting in 940 steps. One important note is that the FinFet transistors at the bottom are Â
even more complicated than the metal wires, and thus additional steps are needed to fabricate Â
them. Furthermore, cleaning the wafer to wash away dust particles that may have landed on the wafer, Â
as well as inspecting the wafer to make sure everything is being built properly, Â
happens frequently and these steps need to be added to the circle. A different tool is Â
used to complete each of these process steps. . Now that we have an understanding of the steps, Â
letâs take a look at this semiconductor fabrication plant. This CPU is manufactured Â
on a 300-millimeter silicon wafer which can fit 230 CPU chips. In contrast DRAM chips are Â
considerably smaller and thus 952 of them can fit on a wafer. These silicon wafers are carried in Â
stacks of 25 using a container called a front opening universal pod, or foup. This sealed Â
plastic wafer carrier is transported around the cleanroom floor using an overhead transport system Â
which lowers the foup onto the toolâs landing pad. Inside the tool, robotic arms transport the wafer Â
through vacuum load locks and to different process chambers where materials are added, Â
removed, or processed in ways that weâll explore later. The wafers are then returned to the foup, Â
resealed inside, lifted up to the overhead transport system, and carried to and dropped Â
onto the next tool, where the next step in the process is completed. To build the entire chip Â
composed of 80 different layers it takes 3 months of traveling from tool to tool where at each Â
stop one of the 940 process steps is completed. In order to increase the microchip mass production Â
capabilities of a semiconductor fabrication plant or fab, typically there are dozens of the Â
same semiconductor tools organized in rows that perform the same process. On the cleanroom floor Â
there are a total of 435 semiconductor tools resulting in the fabâs production capacity of Â
50,000 wafers or 11.5 million CPUs a month. These tools have rather complicated names, Â
so weâll start by categorizing them according to their functionality. There are 6 groups: Â
making the mask layer, adding material, removing material, modifying the material, Â
cleaning the wafer, and finally inspecting the wafer. Weâve color coded the different Â
functional groups to the various tools and process steps to help you not get lost.Â
Letâs next look at each of these semiconductor tools and see how they process the wafer in Â
various ways. Weâll start with the ones that are used to make the mask layer or the nanoscopic Â
stencil on the wafer. These tools include the photoresist spin coater, photolithography tool, Â
developer and photoresist stripper. First the photoresist spin coater applies a light-sensitive Â
layer to the surface of the wafer and sends it through a soft bake where the wafer is Â
heated in order to evaporate the solvent from the photoresist. Next the wafer goes to the Â
lithography tool which shines UV light through a stencil, which is technically called a photomask. Â
The light passes through the stencil and is then demagnified or shrunk down to produce a nanoscopic Â
pattern on the wafer. Wherever the light from the stencil touches the wafer, the photoresist is Â
weakened. The wafer then goes to the developer and the weakened photoresist is washed away, Â
leaving only the patterned nanoscopic stencil on the wafer. The wafer is then sent through a hard Â
bake to harden the remaining photoresist. Next the wafer travels to other tools to Â
undergo processing, and once these processes are completed the wafer goes to a photoresist Â
stripper which uses solvents to dissolve and remove the photoresist mask layer. And thatâs Â
how a mask layer is formed and then removed. The photolithography tool is one of the most Â
important, so letâs take a look at it. Inside is a UV light source, a set of lenses to Â
focus the light, a photomask which contains the stencil, or design of the layer to be patterned, Â
and a wafer carrier. The photomask is 6 by 6 inches, and, based on the dimensions of the CPU, Â
can fit 2 copies of a single layer of the CPU design. The purpose of using Â
a photomask with these crazy optics is because itâs a reliable way to copy and paste a design Â
for billions of nanoscopic transistors and wires onto 230 identical CPUs on a single wafer in a Â
few minutes. After the light passes through the photomask, the UV light goes to more lenses in Â
order to shrink down the pattern by a factor of 4 and print a single layer of the design onto the Â
photoresist. The wafer carrier steps from position to position, printing the photomask image at each Â
stop, until all 230 chips are patterned. Letâs clarify one detail. In our previous Â
examples, we talked a lot about this CPU having 80 layers. Specifically, what we were referring to is Â
the number of photomasks and mask layers used to create all the different layers of patterns on Â
the wafer. Therefore, one complete CPU chip uses 80 different photomasks, each costing Â
300,000 dollars. With only one mask layer being patterned at a time, this CPU chip will undergo 80 Â
separate visits to the lithography tool. We could spend another hour talking about photolithography Â
but letâs move onto the next category of tools. Deposition tools are used to add or deposit Â
material onto the wafer. A lot of times we use the mask layer from the photolithography Â
step to add materials to the areas uncovered by the mask layer, kind of like spray painting Â
through a stencil. Due to the wide range of elements and compounds used to create the layers, Â
deposition tools have a wide range of variations with complicated names and acronyms for each Â
variant. But essentially there are 3 key groups of materials that are added or deposited onto Â
the wafer: metals such as copper or tantalum, insulators which are typically called oxides, Â
and crystalline layers of silicon. Each group of different materials uses different physics and Â
chemistry principles to deposit the material on the wafer and therefore has a different Â
technical name for the tool that deposits the material. Deposition tools typically have a Â
central wafer handling chamber, with the various chambers attached to the edges, each one dedicated Â
to adding just a single element or compound. The next category of machines do the opposite, Â
which is to remove material. There are 2 key methods. The first is etching. Etchers Â
use either corrosive chemicals or high energy plasmas to react with and remove materials from Â
the surface of the wafer. They are typically used with the mask layer stencil in order to remove the Â
material exposed by the mask, thus creating a hole that can be later filled by a deposition tool.Â
The second method to remove material is CMP, which is chemical mechanical planarization. CMP Â
applies slurry and uses abrasive pads to grind and polish away the top surface of the wafer, Â
making it perfectly flat. CMP levels off the top layers of the wafer and is typically used as the Â
last step in a cycle of processes in order to prepare the wafer for another layer to be added.Â
The fourth category are tools that modify the silicon and are called ion implanters. These tools Â
use the photomask stencil to bombard the unmasked regions with phosphor, boron, or other elements Â
in order to make the P and the N regions required to form the transistors themselves. Therefore, ion Â
implanters are only used in the front end of line. You might think that this is adding material. Â
However, ion implanters only add around one atom of phosphor or boron for every 10,000 atoms of Â
silicon. Additionally, while other machines spray paint a layer on top of the wafer, ion implanters Â
hurl atoms deep into the silicon lattice, kind of like a cannon launching a baseball 6 feet into Â
a concrete wall. This process typically damages the silicon lattice, which is why the following Â
step is to repair the silicon by heating the wafer using a separate tool called an annealer.Â
The fifth category of tools are used to clean and remove any contaminants or particles from the Â
wafer. These wafer washers use ultra-pure water to clean the wafer and then dry it with nitrogen or Â
hot isopropyl alcohol. Cleaning the wafer happens rather frequently in order to remove any stray Â
particles that may have fallen onto the wafer. And finally, sixth are tools that inspect the Â
transistors and metal layers for defects and are called metrology tools. A common metrology Â
tool uses a scanning electron microscope with nanometer-level resolution to take pictures of the Â
top surface of the wafer and determine if there are defects such as improperly patterned layers Â
or particles on the surface. When fabricating an integrated circuit that takes 3 months to Â
complete, itâs important to repeatedly monitor the progress and make sure that each of the processes Â
is being executed with nanometer-level precision. Now that weâve covered each of the categories, Â
here are the color coded process steps along with the layout of the tools in the Â
semiconductor fabrication plant. Letâs run through the complete set of steps used to Â
manufacture a single metal interconnect layer. First a layer of insulating silicon dioxide is Â
deposited onto the wafer. Next photoresist is spread across the surface and the wafer is sent Â
through a soft bake to remove the solvent. The wafer then travels to the photolithography tool Â
where the design from the photomask is transferred to each of the chips on the wafer by weakening Â
the areas of photoresist hit by the light. The wafer next goes to the developer to wash away Â
the sections that were hit by the light from the lithography tool and then through a hard bake to Â
harden the remaining photoresist. With the mask layer built, the wafer goes to an etching tool, Â
where a plasma etcher removes a vertical column through the exposed silicon dioxide until it Â
reaches the previous layerâs metal vias. Next the wafer is sent to a photoresist stripper where the Â
mask layer is removed. The wafer then travels to a physical vapor deposition tool where a Â
sequence of metals fills in the exposed pattern and coats the wafer in metal. Finally the wafer Â
is sent to a chemical mechanical planarization tool where the metal is ground down so that all Â
that remains is a flat layer of insulating silicon dioxide and conductive copper interconnects that Â
match the pattern from the photomask. A single metal layer is now completed, and the wafer is Â
ready for the next cycle to begin where insulating silicon dioxide and the vias will be added. Note Â
that cleaning and wafer metrology or inspection steps occur in between many of these other Â
steps. Furthermore, the process steps to make the transistors are less straightforward and utilize Â
the ion implanter, and thus weâll cover them in a separate video on transistor physics and design.Â
These steps are for building the integrated circuit on the wafer, however, Â
there are additional steps in manufacturing a microchip which weâll explore in a little bit.Â
But before we get there, one important thing to note is that the semiconductor industry Â
is incredibly secretive regarding the exact tool layout and the process steps and recipes used to Â
make the transistors. We wanted to make the best video on how microchips are made and it took us Â
180 hours of scouring the internet and textbooks for information and reference images and, using Â
what we found, we spent 205 hours modeling each of these tools, the many layers of the integrated Â
circuit, and the semiconductor fab. Furthermore, writing the script took about 100 hours, and then Â
animating all these visuals took more than 825Â hours. As a result, this video took over 1300Â Â
hours to make, and itâs entirely free to watch. We want to make more videos like this one where we Â
explore computer architecture and how transistors work, and we canât do it without your help. The Â
best way you can help is by taking a few seconds to scroll down, write a comment below, like this Â
video, subscribe if you havenât already and then share this video on social media or send it to a Â
friend or colleague. Truly, just a few seconds of your time helps far more than you think. Â
Additionally, we have a Patreon page where weâll be releasing behind the scenes footage Â
of our work and updates for upcoming videos. If you find what we do useful, Â
we would appreciate any support. Thank you. So then, what are the additional steps in Â
manufacturing a microchip? Before chip manufacturing at the fab, Â
we first have to manufacture the silicon wafers by refining quartzite into pure silicon, Â
and then growing a monocrystalline ingot and cutting it into wafers. For reference, Â
these 300-millimeter wafers are around three-quarters of a millimeter thick, Â
they have a barcode on the side and a small notch in them to indicate the direction of the Â
crystal lattice. Furthermore, these wafers are incredibly delicate, and shatter into hundreds Â
of shards when broken. A single wafer costs around a hundred dollars, but after being Â
populated with CPUs itâs worth closer to a hundred thousand dollars, making it quite literally ten Â
times more valuable than its weight in gold. Moving onto the steps after chip manufacturing. Â
The completed wafer is sent to a separate building where each of the CPUs undergoes rigorous testing Â
to figure out if it works as intended. If a CPU works, thatâs great. But frequently a particle Â
or photomask defect has damaged a section of the integrated circuit, rendering that section Â
defective. These semi-functional circuits are then categorized, or binned, based on what still works. Â
These Intel Thirteenth Gen processors are sold as an i9, i7, i5, or i3, depending on how many cores Â
are functional with different product lines of CPUs whose on-board integrated graphics sections Â
are defective. These wafers are transported to another building where the chips are cut Â
out using a laser, flipped over, and placed on an interposer which distributes the connection points Â
to a printed circuit board while a protective heat conductive cover is placed on the back Â
side. The printed circuit board holds the landing grid array that interfaces with the motherboard Â
as well as various electrical components. Next an integrated heat spreader is mounted on top, Â
and the entire assembly is tested one last time before being packaged for sale. Finally, the CPU Â
is now ready to be mounted onto the motherboard and installed into your desktop computer.Â
Itâs important to understand that chip manufacturing requires an incredible Â
amount of science and engineering and thereâs a free and easy way to learn the basic principles Â
inside each of these complex tools and thatâs with this videoâs sponsor, Brilliant.org! Brilliant Â
reimagines how courses are taught. Instead of boring hour-long lectures or textbooks Â
that put you to sleep, Brilliant uses fun and interactive modules inside thousands of lessons Â
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brilliant.org/brancheducation. The link is in the description below.Â
Microchip Fabrication is a massive topic, and thus, we have two more equally complex videos Â
that weâre working on. The first will be an in-depth 3D animated factory tour and the Â
second will explore transistor physics, FinFets, and the next generation of transistors. Weâre Â
also working on a series of videos on GPUs and a separate one on CPU architecture so make sure to Â
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How a CPU is made
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