Building a BETTER CPU in Excel

Summary

In this video, the creator demonstrates building a high-performance 8-bit CPU in Excel, dubbed the SRISC CPU, improving on their previous 16-bit design. By streamlining the instruction set to just 10 commands, integrating a stack, and switching to a Harvard memory architecture, the new CPU runs roughly ten times faster while using only 4% of the original spreadsheet space. The video covers CPU architecture, memory management, ALU operations, and programming with Excel-ASM8, highlighting clever optimizations like removing IF statements and using binary logic. The project, complete with a 16x16 pixel screen and open-source files, showcases the power of minimalistic computing in Excel.

Takeaways

• 😀 The creator previously built a 16-bit CPU in Excel without using Visual Basic scripts, but was unsatisfied with its performance and footprint.
• 😀 The new CPU architecture, called Super Risk (SRISC), is designed to be more minimalistic with only 10 instructions, drastically simplifying the previous design.
• 😀 The SRISC CPU uses a stack-based design with operations like push, pop, load, and store to make programming and performance more efficient.
• 😀 The new instruction set reduces complexity by eliminating the need for multiple registers, relying on a single register and stack for operations.
• 😀 By utilizing binary logic and avoiding nested 'if' statements, the SRISC CPU improves computation speed, making the system more efficient in Excel.
• 😀 The CPU architecture combines the fetch and control units into a single unit to reduce the footprint while maintaining the one-cycle execution design.
• 😀 The ALU (Arithmetic Logic Unit) supports only seven operations, simplifying the design and reducing the complexity of calculations.
• 😀 The SRISC CPU uses a 10-bit program counter (PC) with a Harvard architecture separating program ROM from data RAM, reducing memory usage and increasing efficiency.
• 😀 Instead of the traditional Von Neumann architecture, the SRISC CPU implements a more compact Harvard architecture with 1KB of ROM and 1KB of RAM split into four pages each.
• 😀 The SRISC CPU's stack operations were tricky to design within Excel’s grid system, but a final design was achieved to simulate stack-based memory management.
• 😀 The SRISC system uses Excel's built-in conditional formatting and custom assembly language (Excel-ASM8) to execute programs, with a 16x16 pixel screen as an output.
• 😀 The SRISC CPU now runs around 12-14Hz, approximately 10 times faster than the previous version, while reducing its Excel footprint by 96%, demonstrating the system’s improved performance and compactness.

Q & A

What is the primary goal of the speaker in this script?

The speaker aims to improve the performance and footprint of a 16-bit CPU built in Excel, while simplifying the instruction set and architecture.

Why does the speaker choose to simplify the instruction set architecture (ISA)?

The speaker simplifies the ISA to make the system more efficient and compact, reducing the number of instructions from 26 to just 10 to enhance performance and make the machine faster and less resource-intensive.

What role does the stack play in the new SRISC CPU design?

The stack replaces multiple registers, allowing for operations like pushing and popping values to and from memory. It also handles addressing, using the stack to load and store values in memory.

How does the speaker handle conditional logic without using 'if' statements?

The speaker uses binary logic (addition for OR and multiplication for AND) to replace nested 'if' statements. This approach is intended to speed up computation by avoiding the overhead of conditional logic.

Why does the speaker opt for a 10-bit wide program counter (PC) register?

The speaker uses a 10-bit wide PC register to fit a Harvard architecture memory system that separates program instructions (ROM) and data (RAM), with each section having a size of 1KB split into four pages.

What is the significance of switching to Harvard architecture in this design?

By adopting Harvard architecture, the CPU can separate program memory (ROM) and data memory (RAM), which allows for more efficient memory access and management. This helps optimize the overall performance of the system.

Why does the SRISC CPU use a single 8-bit register instead of a 16-bit register?

The speaker chooses an 8-bit register for the SRISC CPU to create a more compact design in Excel, making the system physically smaller while still functional for the project's scope.

What is the effect of reducing the ALU operations from 14 to 7 in the new design?

Reducing the ALU operations simplifies the design, making the CPU more efficient. It decreases the complexity of formulas needed to execute these operations, improving performance and reducing system footprint.

What is the purpose of the Excel-ASM8 assembly language?

Excel-ASM8 is used to write programs for the SRISC CPU, providing support for assembly language features like labels, variables, and binary file inclusion. It facilitates the creation of programs by translating higher-level code into machine instructions for the CPU.

How much improvement in performance does the SRISC CPU achieve compared to the original design?

The SRISC CPU is estimated to run at 12-14Hz, about 10 times faster than the original CPU built in Excel, thanks to various optimizations in the system's design.