What Is...I2C?

Summary

The video script introduces I2C (Inter-Integrated Circuit), a serial communication protocol developed by Philips in 1982 for connecting peripheral devices to microcontrollers. It's known for its simplicity, requiring only two pins, and is cost-effective due to fewer logic gates needed. I2C is widely used in various applications like IoT, consumer electronics, and aerospace. The protocol operates synchronously with a master-slave model, allowing bi-directional communication. It offers different speed modes, with standard, fast, and fast mode plus being the most common. The script also explains the I2C communication process, including start and stop conditions, slave addressing, read/write bits, and data transfer.

Takeaways

• 🌐 I2C (Inter-Integrated Circuit) is a communication protocol for connecting peripheral devices to a microcontroller.
• 📅 I2C was developed by Philips (now NXP) in 1982 for serial communication between integrated circuits.
• 🔗 I2C is widely used in various applications including IoT, consumer electronics, industrial equipment, automotive, and aerospace.
• 💰 I2C devices are cost-effective due to fewer logic gates required and only needing 2 pins for implementation.
• 🔄 I2C operates on a master-slave architecture with the master device providing the clock signal for communication.
• 🚦 I2C is a synchronous, bi-directional, and serial bus protocol.
• 🔢 I2C supports five speed categories ranging from 100 kHz to 5 MHz, with standard mode, fast mode, and fast mode plus being the most common.
• 🔗 Each device on an I2C bus must have a unique slave address, which is specified in the device datasheet.
• 🔵 The I2C protocol involves a start condition, slave address, read/write bit, acknowledge bits, data bytes, and a stop condition.
• ⏲️ I2C transactions are initiated with a start condition where the master pulls the SDA line low while SCL is high.
• 🔔 Acknowledge bits in I2C act as a 'handshake' between the master and slave, ensuring correct data transmission.

Q & A

What does I2C stand for?

I2C stands for Inter-Integrated Circuit, which is also referred to as I2C or IC.

Who created the I2C protocol?

The I2C protocol was created by Philips, now NXP, back in 1982.

What was the original purpose of the I2C protocol?

The original purpose of I2C was to provide a simple serial bus for various TTL integrated circuits or ICs.

Why is I2C still widely used today?

I2C is widely used today because it is cost-effective to manufacture due to fewer logic gates needed and only requires two pins to implement.

What are the advantages of using I2C over other protocols?

I2C offers advantages such as lower costs, simplicity, and the fact that it only requires two pins, making it suitable for a wide range of applications.

What is the nature of communication in I2C?

I2C is a synchronous protocol with master-slave communication, where the master provides the clock and initiates communication with the slave.

What are the different speed categories in I2C?

The speed categories in I2C are Standard Mode (100 kHz), Fast Mode (400 kHz), Fast Mode Plus (1 MHz), High Speed Mode (3.4 MHz), and Ultra Fast Mode (5 MHz).

What is the most common I2C speed category?

The most common I2C speed categories are Standard Mode, Fast Mode, and Fast Mode Plus due to their ease of implementation.

What are the two bus lines in I2C?

The two bus lines in I2C are Serial Clock (SCL) and Serial Data (SDA).

How does the I2C protocol ensure proper communication?

I2C protocol ensures proper communication by using pull-up resistors (R1 and R2), which work on the premise that SCL and SDA bus lines are open drain or open collector.

What is the purpose of the start and stop conditions in I2C?

The start condition initiates an I2C transaction by driving the SDA line low while SCL is high, and the stop condition terminates the transaction by releasing the SDA line while SCL is high, returning the bus to an idle state.

What does the R/W bit signify in I2C communication?

The R/W bit, following the slave address, indicates whether the master wants to read (1) from the slave or write (0) to the slave.

What is the function of the acknowledge bits in I2C?

Acknowledge bits in I2C serve as a 'handshake' between the master and the slave, indicating whether data was received correctly (ACK) or not acknowledged (NACK).

Outlines

00:00

🔍 Introduction to I²C

The script introduces the I²C (Inter-Integrated Circuit) protocol, also known as I²C, which was created by Philips (now NXP) in 1982. It was designed as a simple serial bus for TTL integrated circuits and has become a standard for serial communication between a microcontroller and peripheral devices. I²C is favored for its low cost due to fewer logic gates required and only needing two pins for implementation. It's extensively used in various applications including IoT, consumer electronics, industrial, automotive, and aerospace. The protocol operates synchronously with a master-slave architecture where the master controls the clock and data rate. It's bi-directional, allowing data transfer in both directions serially over two lines: Serial Clock (SCL) and Serial Data (SDA). The script also details the five speed categories ranging from 100 kHz to 5 MHz, with standard mode, fast mode, and fast mode plus being the most commonly implemented due to their simplicity. An example is given with a microcontroller and three slaves, illustrating the use of pull-up resistors necessary for open-drain/open-collector communication. The script concludes with a brief on I²C waveforms, explaining start and stop conditions, slave addressing, read/write bits, and acknowledge bits.

05:01

📈 Understanding I²C Data Transfer

This paragraph delves into the specifics of data transfer over the I²C bus. It explains that data bytes contain information such as register settings, memory contents, or sensor readings. The number of data bytes is determined by the operation being performed. The structure of the slave device and the word or register address that the master wants to access are also part of the data transaction. The paragraph concludes with a discussion on the stop condition, which is necessary to terminate I²C transactions and return the bus to an idle state, ready for the next transaction. Links to related videos, such as an explanation of SPI (Serial Peripheral Interface), are provided to further the viewer's understanding of serial communication protocols.

Keywords

💡I2C

I2C stands for Inter-Integrated Circuit, also known as I-squared-C. It is a synchronous serial bus protocol used for communication between a microcontroller and peripheral devices. In the video, I2C is described as a simple and robust protocol created by Philips (now NXP) in 1982. It's central to the video's theme as it's the main protocol being discussed and its simplicity and robustness are highlighted as reasons for its widespread use.

💡Serial Bus

A serial bus is a type of data bus that transmits data serially, one bit at a time, usually in a linear sequence. In the context of the video, I2C is a serial bus that facilitates communication between a master device (like a microcontroller) and one or more slave devices. The video explains that I2C is a simple serial bus that uses only two pins, making it cost-effective and widely used in various applications.

💡Microcontroller

A microcontroller is a small computer on a single integrated circuit containing a processor core, memory, and programmable input/output peripherals. In the video, the microcontroller acts as the bus master in an I2C communication setup, initiating communication with peripheral devices. It illustrates the role of microcontrollers in managing I2C transactions and their prevalence in devices that use I2C.

💡Slave Device

In the I2C protocol, a slave device is any device that responds to the commands from the master device. The video mentions that I2C is a master-slave communication protocol, with the master providing the clock and the slave devices responding to commands. Examples of slave devices given in the script include a serial EEPROM, a digital temperature sensor, and a fan controller.

💡Bi-directional Bus

A bi-directional bus allows data to be transferred in both directions between devices. The video explains that I2C is a bi-directional bus, meaning the master can both write to and read from the slave devices. This feature is crucial for various applications where data exchange in both directions is necessary.

💡Pull-up Resistors

Pull-up resistors are used to ensure that the bus lines (SCL and SDA in I2C) are in a known state when no device is driving them. In the video, it is mentioned that pull-up resistors R1 and R2 are required for I2C devices to communicate properly. They help to create a logic high state when the bus is idle, which is essential for the correct functioning of the I2C protocol.

💡Start Condition

The start condition in I2C signaling is a specific sequence where the SDA line is pulled low while the SCL line remains high. The video describes how all I2C transactions are initiated with a start condition, which must begin with the bus in an idle state. This condition signifies the beginning of a data transfer between the master and slave.

💡Stop Condition

A stop condition in I2C signaling is a sequence that indicates the end of data transmission. The video explains that a stop condition is defined as the master releasing the SDA line while the SCL signal level is high. It signifies the end of an I2C transaction and returns the bus to an idle state, making it ready for the next transaction.

💡Speed Categories

I2C has different speed categories that define the maximum data transfer rate. The video lists these categories as standard mode, fast mode, fast mode plus, high-speed mode, and ultra-fast mode, ranging from 100 kHz to 5 MHz. These categories are important as they determine the performance of I2C in various applications, with standard mode, fast mode, and fast mode plus being the most commonly implemented due to their ease of use.

💡Acknowledge Bits

Acknowledge bits in I2C are signals sent by the receiver to indicate that data has been received correctly. The video describes acknowledge bits as a 'handshake' between the master and the slave, occurring on every ninth clock cycle. An ACK from the slave confirms receipt of a bit, while an NACK indicates a problem, which is crucial for error checking in data transmission.

💡Data Byte

A data byte in I2C is a unit of data being transferred between the master and slave devices. The video explains that the data byte contains the actual information being communicated, such as register settings, memory contents, or sensor readings. The number of data bytes exchanged can vary depending on the operation being performed, which is determined by the master and the structure of the accessed slave device.

Highlights

I2C was created by Philips (now NXP) in 1982 for TTL integrated circuits.

I2C is a simple serial bus for communication between a peripheral device and a microcontroller.

I2C is now used in almost all microcontrollers sold by any supplier.

I2C devices are cost-effective due to lower logic gate requirements.

I2C requires only 2 pins, making it low cost to implement.

I2C is the most common serial bus used in various applications including IoT, consumer electronics, industrial equipment, automotive, and aerospace.

I2C is a synchronous protocol with a master-slave architecture.

The master device provides the clock which sets the data transfer rate.

I2C is bi-directional, allowing data transfer in both directions.

I2C operates on two bus lines: serial clock (SCL) and serial data (SDA).

There are five speed categories in I2C: standard mode, fast mode, fast mode plus, high speed mode, and ultra-fast mode.

The most common I2C speed categories are standard mode, fast mode, and fast mode plus due to their ease of implementation.

I2C uses pull-up resistors for proper communication, working on an open-drain/open-collector principle.

An I2C transaction starts with a start condition, defined by the master driving the SDA line low while SCL is high.

Each device on the I2C bus requires a unique slave address.

The read/write bit follows the slave address and determines if the master wants to read from or write to the slave.

Acknowledge bits are like a handshake between the master and slave, occurring on every ninth clock cycle.

Data bytes contain the information transferred between the master and slave.

I2C transactions end with a stop condition, which releases the SDA line while SCL is high.

Transcripts

[Music]

hello and welcome again to microchips

memory technology series so what is I

squared C well I squared C is an acronym

for inter integrated circuit it can also

be referred to as a IC or i2c I squared

C was created by Phillips now nxp back

in 1982 as a simple serial bus for their

various TTL integrated circuits or ICS

it provides a simple and robust serial

communication between a peripheral

device and a microcontroller today about

40 years later almost all

microcontrollers sold by any supplier

include at least one connection option

for I squared C communication why

because I squared C devices compared to

other protocols are slightly lower costs

to manufacture due to the lower number

of logic gates needed to build the I

squared C interface and it only takes 2

pins to implement which also translates

to low cost and this lower cost has made

I squared C the most common and widely

used serial bus across most applications

including IOT consumer electronics

industrial equipment automotive and

aerospace here are some details about

the I squared C protocol I squared C is

a synchronous protocol that allows a

master to initiate communication with a

slave device I squared C protocol is a

master slave communication with the

master providing the clock which

effectively becomes the data transfer

rate or clock frequency it is a

bi-directional bus meaning the master

can write to the slave and read from the

slave and it is a serial bus which means

data is clock or shifted bit by bit and

there are two bus lines serial clock SCL

and serial data s da ni squared C there

are five speed categories including

standard mode fast mode fast mode plus

high speed mode in ultra fast mode these

speed categories range from 100

kilohertz to 5 megahertz 100 kilohertz

up to 1 mega Hertz are very similar

while 3.4 mega Hertz requires some

special considerations

and five megahertz being uni-directional

requires yet even more special attention

but by far the most common I squared C

speed categories are standard mode fast

mode and fast mode plus because these

three are the easiest to implement

here's an example of four devices

connected to the same I squared C bus

the microcontroller is the bus master

and the three slaves are a serial East

squared a digital temp sensor and a fan

controller r1 and r2 are the pull-up

resistors which are required for I

squared C devices to communicate

properly this is because I squared C

protocol works on the premise that the

SCL and SDA bus lines are open drain or

open collector the transmitting device

just lets go of the I squared C bus to

create a logic one and pulls or drives

the line the ground to create a logic

zero next let's look at an I squared C

waveform at first the waveform might

look a bit complex but if we break the

waveform down into sections then it will

become much easier to decode all I

squared C transactions are initiated

with a start condition the start

condition is defined as the master

driving the SDA line low to a logic 0

while SEL remains high and note that it

must be initiated with the I squared C

bus in an idle State meaning the SDA

NSEL lines are both high or a logic one

the slave address immediately follows

the start condition and it could be

seven bits or ten bits long

although the seven bit slave address is

by far the most common the slave address

will be specified in the device

datasheet and it is important to note

that each device on the I squared C bus

needs a unique slave address next is the

read and write or r / w bit it

immediately follows the slave address

and together with the slave address form

the control byte this bit informs the

slave if the master wants to read or

write a 1 indicates the master wants to

read from the slave and a 0 means the

master will write to the slave this is

easy to remember by just looking at the

r / w symbol as there's a bar over the w

meaning lo is its active state the next

section is the acknowledge bits and we

can think of the acknowledge bit like a

handshake between the master and the

slave

they occur on every ninth clock cycle

regardless of where we're at in the I

squared C protocol the device receiving

the data is responsible for generating

this acknowledgment and since I squared

C is bi-directional this can either be

the master or the slave a zero means the

receiving device acknowledges or acts

and a one indicates the receiving device

did not acknowledge or next coming from

the slave an ACK indicates the bite was

received correctly coming from the

master an act requests that the slave

transmit the next byte in the operation

while an ACK signals the end of the

operation next is the data byte and the

data byte or data bytes contain the

information being transferred between

the master and the slave the data

contained in this byte can become

ambit's

register settings memory contents sensor

readings or any number of things and the

number of data bytes transmitted it's

determined by the operation being

performed in the structure of the slave

device being accessed common examples

are the word address or register address

that the master wants to access the data

to be written in a write operation or

the data from the slave requested in a

read operation and finally the last

section of the I squared C protocol is a

stop condition all I squared C

transactions should be terminated with a

stop condition the stop condition is

defined as the master releasing the sta

line while the SEL signal level is high

after a stop condition the I squared C

bus will remain in an idle state and

won't be free for the next I Square t

transaction well that is I squared C

here are some links to some other videos

in our memory technology series since

you just watch what is I squared C you

may enjoy our what is SPI video since it

builds off I squared C to explain the

differences between I squared C and the

faster SPI serial bus thanks for

watching