RANT: THE CAS LATENCY TIMING DOESN'T MATTER AS MUCH AS YOU THINK IT DOES
Summary
TLDRIn this video, Buildzoid discusses the often-overemphasized significance of primary timings in DDR5 memory performance, asserting they matter less than commonly believed. He showcases a DDR5 setup with tight timings and compares it against DDR4 benchmarks, revealing that looser primary timings can outperform tighter ones when subtimings are optimized. The video highlights the importance of subtimings in affecting memory latency and performance. Buildzoid invites viewers to engage with his content and emphasizes the need to shift focus from primary to subtimings for improved memory performance.
Takeaways
- 😀 Primary memory timings like CAS latency (CL) on DDR5 don't significantly impact overall performance.
- 😀 DDR4 can outperform DDR5 in specific memory latency-sensitive benchmarks, like Pi Prime.
- 😀 The best performance often comes from optimizing sub-timings rather than focusing solely on primary timings.
- 😀 The latency test results showed that a looser CL40 configuration yielded better performance than a tighter CL28 configuration.
- 😀 Many enthusiasts mistakenly prioritize primary timings, believing they are the most crucial factor for memory performance.
- 😀 Sub-timings are more relevant and can lead to greater performance improvements than simply lowering primary timings.
- 😀 DDR5 subtimings, when set to auto, are often much worse than DDR4 auto subtimings.
- 😀 The most important primary timing for performance is typically tRCD, rather than CAS latency.
- 😀 Buildzoid suggests that optimizing memory requires looking beyond primary timings to achieve better results.
- 😀 Viewers are encouraged to focus on subtimings for enhanced memory performance and are invited to engage with Buildzoid's content for further insights.
Q & A
What is the main argument presented by BuildZoid regarding primary memory timings?
-BuildZoid argues that primary memory timings, particularly CAS latency, are often overemphasized and have less impact on overall memory performance compared to secondary timings.
How does BuildZoid demonstrate the relevance of primary versus secondary timings?
-He runs benchmarks comparing different timing configurations, showing that a setup with higher CAS latency but better subtimings performs better than one with tighter primary timings.
What specific DDR5 setup does BuildZoid test in the video?
-He tests a DDR5 setup running at 28,373 with primary timings of 7-28-1 at a command rate of 1T.
What benchmark does BuildZoid use to highlight memory latency sensitivity?
-He uses the PyPrime benchmark, which is known to be highly sensitive to memory latency, showing that DDR4 can outperform DDR5 in this specific test.
What were the latency test results for the DDR5 setup during the benchmarks?
-The initial latency test results fluctuated around 57.9 ns, which BuildZoid noted was not as good as expected, but later tests showed improved results.
Why does BuildZoid prefer running benchmarks live on video?
-He prefers live benchmarking to avoid any manipulation of results that could occur with screenshots, ensuring transparency in the testing process.
What does BuildZoid say about the relationship between CAS latency and overall memory performance?
-He explains that CAS latency is only relevant for a single memory read operation, and in scenarios involving multiple read commands, it becomes less significant.
What conclusions does BuildZoid draw regarding Auto subtimings in DDR5?
-He states that Auto subtimings in DDR5 are often worse than those in DDR4, leading to poorer performance unless manually adjusted.
How does BuildZoid’s findings challenge common perceptions in the overclocking community?
-His findings suggest that enthusiasts should focus more on secondary timings and overall memory speed rather than getting fixated on achieving lower primary timings.
What recommendations does BuildZoid give to viewers regarding DDR5 memory purchases?
-He advises viewers to consider memory chips that are likely to overclock well, rather than solely focusing on the stated primary timings, as those may not reflect the actual performance potential.
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