6. OCR A Level (H046-H446) SLR2 - 1.1 CISC vs RISC

Summary

This video explores the differences between CISC and RISC processors. CISC processors use complex instructions to complete tasks in fewer lines of assembly, while RISC processors use simpler instructions executed in a single clock cycle. Despite requiring more lines of code, RISC's efficiency, lower power consumption, and use of pipelining make it dominant in modern devices. The video also discusses the performance equation and historical challenges RISC faced before becoming the industry standard.

Takeaways

• 💻 **Instruction Set Importance**: The script explains that at the core of all computers is the instruction set, which is the set of all machine code instructions recognized by the CPU.
• 🔍 **CISC vs RISC**: There are two main categories of instruction sets: Complex Instruction Set Computers (CISC) and Reduced Instruction Set Computers (RISC).
• 📚 **CISC Efficiency**: CISC processors aim to complete tasks with fewer lines of assembly code, which means the processor hardware and circuitry is more complex.
• 🔧 **CISC Example**: The script uses 'malt' as an example of a complex instruction in CISC that can multiply two numbers and store the result in one operation.
• 📉 **CISC Decline**: CISC architecture, once common in desktops and laptops, is now less common, with Intel's x86 processors being a notable exception.
• 🏃 **RISC Simplicity**: RISC processors use simple instructions that are executed within a single machine or clock cycle, which requires more lines of assembly code.
• 🚀 **RISC Performance**: RISC architecture can take advantage of pipelining to speed up the processor, as all instructions have uniform execution times.
• 🔋 **RISC Power Efficiency**: RISC processors are popular in low-power devices due to their lower energy requirements and simpler hardware.
• 📈 **RISC Dominance**: ARM and other RISC-based processors now make up over 90% of all processors in use, indicating their widespread adoption.
• 📊 **Performance Equation**: The script introduces a performance equation that contrasts CISC's focus on minimizing instructions per program with RISC's focus on reducing cycles per instruction.
• 📱 **RISC Adoption**: Despite early challenges, RISC has become dominant due to factors like the reduction in RAM prices and advancements in compiler technology.

Q & A

What is the core element of all computers?

The core element of all computers is the instruction set, which is the set of all instructions written in machine code that can be recognized and executed by a given processing unit or CPU.

What are the two main categories of instruction sets?

The two main categories of instruction sets are Complex Instruction Set Computer (CISC) and Reduced Instruction Set Computer (RISC).

What is the primary goal of CISC processors?

The primary goal of CISC processors is to complete tasks in as few lines of assembly as possible, which means the processor hardware and circuitry is more complicated to understand and execute a series of operations.

What is an example of a complex instruction in CISC?

An example of a complex instruction in CISC is 'malt', which would load two values into a register, multiply them together, and store the result back out.

Where is CISC architecture mainly found today?

CISC architecture is mainly found in desktop computers and laptops, with Intel's x86 processors being an example, although they now operate much like RISC with the use of microcode.

What is the aim of RISC processors?

The aim of RISC processors is to use simple instructions that will be executed within a single machine or clock cycle.

How does RISC handle complex commands that don't exist in its architecture?

RISC handles complex commands by separating them into a number of simpler commands, requiring more lines of assembly but each executable in a single clock cycle.

What are the benefits of RISC architecture?

RISC architecture benefits include lower energy requirements, simpler hardware, more room for general-purpose registers, and the ability to use pipelining to speed up the processor.

Why have RISC architectures become popular in low power and portable devices?

RISC architectures have become popular in low power and portable devices due to their efficiency, lower energy requirements, and the fact that they can execute instructions in a single clock cycle.

What is the performance equation and how does it relate to CISC and RISC?

The performance equation is used for expressing a computer's performance potential. CISC aims to minimize instructions per program but sacrifices cycles per instruction, while RISC aims to reduce cycles per instruction at the cost of increasing the number of instructions in the assembly program.

Why did it take RISC a long time to gain acceptance on a commercial scale?

It took RISC a long time to gain acceptance on a commercial scale due to a lack of software support compared to CISC, and the influence of companies like Intel which were producing powerful CISC processors.

How has the reduction in price of RAM and increased sophistication of compiler technology affected RISC?

The reduction in price of RAM and increased sophistication of compiler technology has made the RISC emphasis on software over hardware ideal, leading to the widespread adoption of RISC-based processors.

Outlines

00:00

💻 Introduction to CISC and RISC Architectures

This paragraph introduces the concept of instruction sets in computer processors, specifically focusing on Complex Instruction Set Computers (CISC) and Reduced Instruction Set Computers (RISC). It explains that the instruction set is the foundation of all computer operations, detailing how it is written in machine code and understood by the CPU. The paragraph uses a high-level abstraction of a computer's storage design to illustrate the process of executing a calculation using an execution unit and registers. It contrasts CISC processors, which have a wide range of instructions and can execute complex operations in a single instruction, with RISC processors, which use simpler instructions executed in a single machine cycle. The example of multiplying two numbers is used to demonstrate the difference in assembly code complexity between CISC and RISC, with CISC requiring less assembly code but more machine cycles, while RISC requires more assembly code but each instruction is simpler and faster to execute.

05:01

📈 Advantages and Popularity of RISC Architecture

The second paragraph delves into the advantages of RISC architecture, such as the use of simple instructions that can be executed in a single clock cycle, leading to faster processing. It mentions that RISC requires fewer transistors and less complex hardware, which allows for more general-purpose registers and benefits from techniques like pipelining to increase speed. The paragraph also discusses the historical context of RISC gaining popularity over CISC, especially in low-power and portable devices, due to its lower energy requirements and efficiency. It contrasts this with CISC's historical dominance in desktops and laptops, noting that even Intel's x86 processors, which are CISC-based, have adapted to operate more like RISC processors. The paragraph concludes with a summary of the key differences between CISC and RISC architectures, highlighting RISC's prevalence in modern devices.

10:02

📉 The Shift from CISC to RISC in the Market

The final paragraph of the script addresses the shift in the market from CISC to RISC processors. It discusses the performance equation used to express a computer's performance potential, where CISC aims to minimize instructions per program at the cost of more cycles per instruction, while RISC does the opposite. The paragraph notes the historical lack of software support for RISC compared to CISC, especially in the early days when operating systems like Windows 3.1 and 95 were designed with CISC in mind. It also touches on how Intel's dominance in CISC processors initially hindered the adoption of RISC. However, it concludes by stating that the reduction in RAM prices and advancements in compiler technology have made RISC's emphasis on software over hardware ideal, leading to a significant market share for RISC-based processors over CISC, as evidenced by sales data showing a peak for CISC processors in 2011.

Keywords

💡Instruction Set

An instruction set is the foundation of a computer's operation, defining the set of commands that a CPU can understand and execute. In the video, it's described as the 'set of all instructions written in machine code' that a processing unit can handle. This concept is central to understanding the differences between CISC and RISC architectures, as they offer different approaches to handling these instructions.

💡CISC (Complex Instruction Set Computer)

CISC refers to a type of computer architecture where the CPU can execute a wide variety of complex instructions. The video explains that CISC processors are designed to complete tasks with fewer lines of assembly code, which means the hardware is more complex. An example from the script is the 'malt' instruction, which is a hypothetical complex instruction that multiplies two numbers and stores the result. CISC architectures are traditionally found in desktops and laptops, with Intel's x86 processors being a notable example.

💡RISC (Reduced Instruction Set Computer)

RISC architecture focuses on using a smaller set of simple instructions that can be executed within a single machine or clock cycle. The video contrasts RISC with CISC by stating that RISC processors aim to reduce the complexity of hardware, which in turn allows for more general-purpose registers and the use of techniques like pipelining to increase performance. RISC is now prevalent in low-power devices such as smartphones and tablets, with ARM processors being a common example.

💡Assembly Language

Assembly language is a low-level programming language that is specific to a computer architecture. The video uses assembly language to illustrate the difference between CISC and RISC, showing that CISC can achieve a task with fewer assembly instructions but may require more clock cycles, whereas RISC requires more assembly instructions but each can be executed in a single clock cycle.

💡Main Memory

Main memory, also known as RAM, is where a computer stores its data that is readily accessible for processing. In the video script, main memory is depicted as having ten locations, each with a specific address. It's where the numbers to be multiplied are stored and where the result of the multiplication is to be stored, illustrating the flow of data in a computer system.

💡Execution Unit

The execution unit is the part of the CPU that performs arithmetic and logical operations. The video describes it as the component that carries out all calculations, emphasizing that it can only operate on data loaded into registers. This highlights the importance of registers in the processing workflow and the role they play in executing instructions.

💡Registers

Registers are small, fast storage locations within the CPU used for temporarily holding data. The video mentions six registers labeled from r000 to r101, which are used to store data that the execution unit will work on. Registers are a critical component in both CISC and RISC architectures, as they facilitate quick data access and manipulation.

💡Pipelining

Pipelining is a method of improving processor performance by allowing multiple instructions to be processed simultaneously at different stages of the pipeline. The video explains that because RISC instructions are uniform in execution time, they can be effectively pipelined, which contributes to the efficiency and speed of RISC processors.

💡Microcode

Microcode is a low-level programming language used to control the functions of a CPU. The video mentions that Intel's x86 processors, which are CISC-based, utilize microcode to operate more like RISC processors. This allows them to leverage some of the benefits of RISC architecture, such as efficiency and simplicity.

💡Performance Equation

The performance equation is a formula used to express a computer's performance potential. The video uses this equation to compare CISC and RISC architectures, showing that CISC aims to minimize instructions per program at the cost of more cycles per instruction, while RISC does the opposite, reducing cycles per instruction but potentially increasing the total number of instructions.

💡Compiler

A compiler is a program that translates code written in a high-level programming language into machine code that the CPU can execute. The video discusses how the compiler's role differs between CISC and RISC architectures, with CISC requiring less work from the compiler due to its complex instructions, while RISC requires more conversion work, leading to more assembly instructions.

Highlights

Instruction sets are the foundation of all computers, defining the operations CPUs can execute.

Two main categories of instruction sets: CISC (Complex Instruction Set Computer) and RISC (Reduced Instruction Set Computer).

CISC aims to complete tasks with fewer lines of assembly, resulting in more complex processor hardware.

RISC uses simple instructions executed within a single machine cycle, requiring less complex hardware.

CISC processors, like Intel's x86, are mainly found in desktops and laptops but operate more like RISC with microcode.

RISC architecture is prevalent in low-power devices such as smartphones, smart TVs, and tablets.

RISC processors, like ARM, now dominate the market, making up over 90% of all processors in use.

CISC processors may have more instructions but can be problematic for pipelining due to variable instruction length.

RISC's fixed-sized instructions facilitate pipelining, improving performance.

RISC's efficiency comes from completing each instruction in a single clock cycle.

The performance equation shows CISC aims to minimize instructions per program, sacrificing cycles per instruction.

RISC philosophy reduces cycles per instruction, increasing the number of instructions in the assembly program.

RISC's acceptance was slow due to a lack of software support and competition from established CISC processors.

The reduction in RAM prices and advancements in compiler technology have favored RISC's software-over-hardware approach.

Intel's influence and resources were a significant obstacle for RISC's early adoption.

Despite being CISC, Intel x86 processors implement features that allow RISC-like operation.

Sales of RISC-based processors have far surpassed those of CISC, with CISC peaking in 2011.

Transcripts

in this video we take a look at the

differences between

and the uses of sisk and risk processors

[Music]

so at the core of all computers is what

is known as the

instruction set this is effectively

the set of all instructions written in

machine code

that can be recognized and executed by

given processing unit or cpu

there are two main different categories

of instruction sets that you need to be

aware of

there's the complex instruction set

computer sisk

and the reduced instruction set computer

risk

so here on the screen is a high

level abstraction of a storage design

for a generic computer and it's going to

serve the purpose

of our illustration so important things

to note

we've got main memory at the top and

it's got ten locations

and they're addressed from zero zero

zero zero in binary

through to one zero zero one

we also have what we're labeling the

execution unit which is going to carry

out all calculations

now the execution unit can only operate

on data that's been loaded into one of

six registers

and we've labeled them r zero zero 0

to r 1 0 1.

so our task is to find the product of

two numbers

the first number is going to be stored

in memory location zero

zero zero zero the second number in zero

zero zero one and then the result of the

calculation the product of those two

numbers

should be stored back in memory location

zero zero

one zero so in a high level language

this would be a line of code something

like product

equals num1 times num2

where each of those words are variables

or locations

so let's start with the complex

instruction set computer

so cis gains to complete the task in as

few lines

of assembly as possible now this means

the processor hardware

and the circuitry tends to be more

complicated

so it's able to understand and execute a

series of operations

the cisc processor could include a

specific instruction

for multiplying two numbers and we're

going to call that malt here we've

shown it on the screen when executed

this instruction would load the two

values into the register

multiply them together and store the

result back

out

so malt is an example in our abstraction

here

of a complex instruction it resembles

the original command from the high-level

language

the compiler therefore is having to do

very little work

to translate the original high-level

language statement

into low-level assembly code

however this complex instruction

might take more than one machine or

clock cycle in order to execute

now we're going to come back to that

point a bit later when we compare the

two

so although much less common today than

it used to be

the sisk architecture is mainly found in

desktop computers and laptops

intel's x86 processors still use the sys

architecture

although more recent changes beyond the

scope of this course

mean they operate very much like a risk

fashion

and they utilize micro code which allows

them to leverage many of the benefits

of the risk architecture which we're now

going to look at

so with risk processes the aim is to use

simple instructions which will be

executed within a single

machine or clock cycle now in our

generic computer example here that we're

using

at least we're going to say that the

complex command such as

malt doesn't exist we would need to

separate it into a number of simpler

commands

in this situation we're going to need

four lines of assembly

two for loading the different contents

of memory

one for providing the product and

another to store the result back out

whereas remember before with the sisk

architecture we had a single low-level

command that performed all of that

now there are more lines of code

required in the assembly version

than the high level version which only

had one line

this means the compiler is now being

required to do much of the conversion

work

more ram is needed to store the assembly

instructions

so on the face of it it would seem that

the risk architecture

is much less efficient

but we come back to the point that with

this

system each instruction can be completed

in a single clock cycle

these risk instructions require fewer

transistors

and less complex hardware this leaves

more room for general purpose registers

in cash

and we already know the benefits of that

at speeding up a processor from a

previous video

as all the instructions are uniform in

terms of their execution time

we can make use of pipelining another

way of speeding up the processor we

discussed earlier

the use of risk processing results also

in lower energy requirements

risk architectures have become

incredibly popular

in low power and portable devices such

as smart tvs

thermostats smart watches phones tablets

printers home assistants tb sticks and

many

many more as such arm processors

and other architectures that work off of

risk now make up

well over 90 percent of all processors

in use today

so here is a summary of sisk

architecture on the left

compared to risk architecture on the

right

i'm not going to read it all to you but

you might like to pause the video

and take some notes

so having watched this video you should

be able to answer the following key

question

what are the differences between the

risk and sisk architectures

so that's everything covered in the

specification so you can stop taking

notes

but if you're interested in learning a

little bit more and going a little bit

deeper

then watch the remainder of this video

so something not in the spec which is

quite interesting to learn about

is known as the performance equation now

this is an equation

commonly used for expressing a

computer's performance

potential

now the sisk approach attempts to

minimize

the number of instructions per program

but while sacrificing the number of

cycles per instruction

the risk philosophy does completely the

opposite

it attempts to reduce the cycles per

instruction

but at the cost of the number of

instructions that end up in the end

assembly program

you can clearly see here some of the

concepts that we've been talking about

in raw numbers

so look at the number of instructions

available in sisk versus

risk there are a lot more instructions

in the complex instruction sets

than the reduced instruction set

varieties

but you can see that there's a variable

length of sisk instructions

and of course this becomes problematic

when we

try to utilize pipelining to increase

performance

now risk gets around this by fixed sized

instructions

now even though risk-based processing

has many advantages

it did take well over a decade to gain

acceptance on a large commercial scale

risk lacks software support versus sisk

especially in the early days

windows 3.1 and 90 to 5 were designed

with cisc processors in mind

and most companies were unwilling to

take a chance on risk

which was seen as an emerging technology

in the beginning intel cisc processors

were a major setback for the emergence

of risk

intel had enormous influence and

resources

to throw at producing ever more powerful

cis processes

despite them becoming increasingly

unwieldy and difficult to develop

today though intel x86 is arguably the

only chip

that retains sisk architecture and even

then if you dig a bit deeper below the

surface

you'll realize it implements many

features such as micro codes

that allows it to operate in a risk

type fashion the reduction in price of

ram

and increased sophistication of compiler

technology

means the risk emphasis on software over

hardware has become ideal

you can easily see from this graph that

sales of risk-based processors

far outstrip intel sysversons which

peaked at

0.3 billion processors back in 2011.

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