RISC vs CISC | Computer Organization & Architecture
Summary
TLDRThis educational video delves into the distinctions between CISC and RISC architectures, pivotal for competitive and university exams. It highlights the fundamental differences based on instruction set complexity, with CISC featuring more instructions and variable-length formats, while RISC boasts fewer instructions and fixed-length formats. The video also touches on addressing modes, cost implications, hardware requirements, and control units. Examples like Fugaku, a supercomputer using RISC, are provided. The script contrasts CISC's single-instruction complexity with RISC's multi-instruction simplicity, concluding with the observation that RISC's popularity has surged due to the decreasing cost of RAM.
Takeaways
- 🎓 **Importance of Risk vs. CISC**: The video emphasizes the significance of understanding the differences between Risk and CISC architectures for competitive and university-level exams.
- 📚 **Syllabus Coverage**: The channel has covered most of the computer organization and architecture syllabus, with only 2-3 topics remaining.
- 🔍 **Instruction Set Basis**: The categorization of CISC and RISC is based on the complexity of the instruction set, which refers to the number of instructions available.
- 📈 **Complex vs. Reduced Instruction Set**: CISC has a large number of instructions, making it complex, whereas RISC has a reduced set of instructions.
- 🛠️ **Instruction Format**: CISC uses variable-length instruction formats, while RISC uses a fixed-length format, typically 32 bits.
- 📊 **Program Counter Clarity**: Fixed-length instructions in RISC provide clarity for the program counter, simplifying the process of locating the start and end of each instruction.
- 🔄 **Addressing Modes**: CISC supports a large number of addressing modes, whereas RISC has a limited, more straightforward set of addressing modes.
- 💰 **Cost and Power**: CISC architectures are more powerful but costly due to the complexity and extensive instruction set, whereas RISC is less costly and more efficient.
- 🔄 **Cycles and CPI**: CISC instructions may require multiple cycles to complete, leading to a higher CPI (Cycles Per Instruction), while RISC aims for a CPI of 1 through pipelining.
- 💾 **Memory Utilization**: CISC tends to perform more memory-to-memory operations, whereas RISC relies more on register-to-register operations with load and store instructions.
- 🛠️ **Control Unit**: CISC architectures often use microprogrammed control units, which are flexible, whereas RISC uses hardwired control units, which are fixed and less flexible.
Q & A
What is the main difference between CISC and RISC architectures?
-The main difference between CISC (Complex Instruction Set Computer) and RISC (Reduced Instruction Set Computer) architectures is the number of instructions. CISC has a large number of instructions, while RISC has a reduced number of instructions.
What is the significance of variable length instruction format in CISC?
-In CISC, the variable length instruction format means that instructions can be of different sizes, such as 16-bit, 32-bit, or 64-bit, which is not of one fixed size.
How does fixed length instruction format benefit the program counter in RISC?
-Fixed length instruction format in RISC benefits the program counter by providing a consistent size for each instruction, making it easier to determine the start and end of each instruction and the address of the next available instruction.
What is the impact of the number of addressing modes on the complexity of instructions in CISC and RISC?
-CISC supports a large number of addressing modes, which can make the instructions more complex. In contrast, RISC supports fewer addressing modes, which simplifies the instructions.
Why is the cost of hardware higher in CISC compared to RISC?
-The cost of hardware is higher in CISC because it requires more complex instructions, additional functionality, and more resources to support the large number of instructions.
How does the execution of instructions differ between CISC and RISC in terms of cycles?
-CISC may require multiple cycles to execute complex instructions, while RISC aims to complete instructions in a single cycle, often using pipelining to maintain a CPI (Cycles Per Instruction) value of 1.
What is the typical memory manipulation strategy in CISC?
-In CISC, instructions are mostly memory-to-memory, meaning that many operations are performed directly in RAM without the need for intermediate register operations.
How does RISC utilize memory compared to CISC?
-RISC tends to use registers more often for operations and relies on load and store instructions to move data between memory and registers, rather than performing operations directly in memory.
What is the difference between micro programmed control unit and hardwired control unit in the context of CISC and RISC?
-CISC typically uses a micro programmed control unit, which allows for more flexibility and the ability to make changes. RISC, on the other hand, uses a hardwired control unit, which is more fixed and less flexible but can be more efficient.
Can you provide an example of a RISC architecture mentioned in the script?
-Yes, Fugaku, which was a supercomputer in 2020, is mentioned as an example of a RISC system.
How does the script illustrate the difference between CISC and RISC with an example involving multiplication?
-The script provides an example where in CISC, a single MULT instruction can be used to multiply values X and Y directly in memory, whereas in RISC, this operation would require multiple instructions, such as loading the values into registers, performing the multiplication, and then storing the result back in memory.
Outlines
💻 Introduction to CISC and RISC
The speaker begins by introducing the video's focus on the differences between CISC (Complex Instruction Set Computer) and RISC (Reduced Instruction Set Computer) architectures. Emphasizing their importance for competitive and university-level exams, the speaker encourages viewers to engage with the content through likes and subscriptions. The video aims to cover the remaining topics in the computer organization and architecture syllabus, providing a comprehensive playlist for viewers. The core distinction between CISC and RISC lies in the number of instructions: CISC has a large set, while RISC has a reduced set. This fundamental difference leads to various other characteristics, such as variable-length instruction formats in CISC versus fixed-length in RISC. The speaker also discusses the implications for program counter readability and the complexity of handling variable instruction lengths.
🔍 Deep Dive into CISC and RISC Characteristics
In the second paragraph, the speaker delves deeper into the characteristics of CISC and RISC architectures. CISC supports a large number of addressing modes, which can be complex to manage due to the variety, whereas RISC supports fewer modes, simplifying the process. The speaker also touches on the cost implications, with CISC being more expensive and powerful due to its extensive instruction set, which requires more hardware support. The discussion continues with the concept of single-cycle versus multiple-cycle instructions and the impact on the CPU's performance, measured by CPI (Clock Cycles per Instruction). The speaker contrasts memory-to-memory operations in CISC with the register-to-register operations in RISC, highlighting the efficiency of memory utilization in CISC. The paragraph concludes with examples of architectures that use RISC, such as the Fugaku supercomputer, and a practical example to illustrate the differences in executing a multiplication operation in both architectures, emphasizing the trade-offs between the two in terms of micro-operations and memory usage.
Mindmap
Keywords
💡Gate Smashers
💡Risk
💡CISC
💡Instruction Set
💡Variable Length Instruction Format
💡Fixed Length Instruction Format
💡Program Counter
💡Addressing Modes
💡Cost
💡CPI
💡Micro-operations
💡Memory Utilization
Highlights
Difference between Risk and CISC is crucial for competitive exams and college/university level exams.
CISC and RISC categorization is based on the instruction set complexity.
CISC has a large number of instructions, making the system complex.
RISC has a reduced number of instructions, simplifying the system.
CISC uses variable length instruction format.
RISC uses fixed length instruction format, benefiting the program counter.
CISC supports a large number of addressing modes.
RISC supports fewer addressing modes, simplifying instruction handling.
CISC is more costly and powerful due to the large instruction set.
RISC is less costly with simpler instructions that can be combined for complexity.
CISC may require multiple cycles to complete an instruction.
RISC aims to complete instructions in a single cycle, improving CPI.
CISC performs more memory-to-memory operations.
RISC uses registers more often, with load and store instructions as the norm.
CISC is based on a micro programmed control unit, allowing changes.
RISC is based on a hardwired control unit, providing a fixed environment.
Examples of popular architectures using RISC include Fugaku, a supercomputer from 2020.
RAM cost reduction has made RISC more popular than CISC in recent times.
The video provides a clear example comparing CISC and RISC operations.
Transcripts
Dear students, welcome to Gate Smashers
In this video I am going to explain the difference between
Risk and Cisc which is a very important topic
From your competitive exams point of view
Even it is very important for college and university level exams
So guys like the video quickly and subscribe the channel
If you haven't done it yet and if you have done it
Then you can share it with other devices
Subscribers are very important
So as you know that the maximum syllabus of computer organization and architecture
We have completed the maximum syllabus on our channel
You will get all the videos in the playlist
I am covering the remaining 2-3 topics
So that you can prepare the entire playlist, the entire syllabus in that playlist
So if we talk about cisc and Risk
So the categorization we have done
On what basis is it done based on an instruction set
Means how many number of instructions we have to put
So what is the meaning of complex instruction set
Why we made the system complex
Because number of instructions are large
And if we talk about it, what is the meaning of reduced instruction set
Number of instructions are less
The most important difference is this
Number of instructions are large
What is the number of instructions, I have less
Now here on the basis of that only the other differences are being made
Then if we talk here
Variable length instruction format
Means the instructions we are using in this
Is 16 bit, 32 bit, 64 bit
Means it is not of one size
We have kept instructions of different sizes
But here I have fixed length instruction format
Means I am using 32 bit instruction format
So in that only my opcode, operand, whatever field I am keeping for instruction
I am doing fixed format
So this point gives benefit to whom
It gives benefit to program counter
Because program counter knows that instruction start from here
And next instruction starts from here
End is here, from that next starts from here
Here it is a little difficult, why
Because if one instruction is of 1 byte
It is of 2 byte, 4 byte, 8 byte
So according to that program counter has to contain address of next available instruction
So this point is a little bit
For that problem can not be called a problem
Means this point is a little bit difficult according to program counter
But this is its easiness, that's it
You can write no to problem or that
Then if we talk about large number of addressing modes
Here it supports large number of addressing modes
What is large number? Means all your 8-9 addressing modes have variations
What is supporting all of them?
Few number of addressing modes
Maximum we have 4 addressing modes here
And here I have so many addressing modes
What problem can come?
Or what you can say is important point
If you are asked in exam
Then you have to mention in the instruction
Which addressing mode is there, where is your operand
So this thing you have to mention separately here
Because number of addressing mode is supporting more
Number of addressing mode is supporting less
That's why it works properly in fixed length
Then if we talk about cost
Cost is high, more powerful
Simple reason you know is number of instruction set is large
Number of instruction set large means
That if you have to do any work, division, multiplication
You have to check any bit, if you have to check anything
You will get maximum instructions in this
But here you will not get maximum instructions
Yes, you can use available instructions
And make complex instructions
But by default you are getting
Easy instructions or less number of instructions
You can use them multiple times and make it as a complex
But here you will get complex by default
On hardware obviously
If you want to get more number of instructions
Then hardware should be more available
Now let's say you have to do addition, subtraction
You have to do multiplication, division
So hardware should support you properly
You should have more additional functionality in hardware
That's why it will be costly but powerful
What is here?
Let's say you have only addition and subtraction
If you don't want multiplication, what can you do?
To do multiplication
You can get addition multiple times
So what does it mean?
It easily provides you all the instructions
But if hardware cost will be more
That's why overall cost will increase
And overall cost will be less
Then if we talk about several cycle instructions
Means instructions are not necessary
That work will be completed in one cycle
You can also take multiple cycles
The CPI value is a bit here
That's why it is a bit messy, it is too much
But here we try to keep CPI 1 using the pipeline
Because instruction is complete in single cycle
Then manipulation directly in the memory
Here your instructions are mostly memory to memory
Means whatever changes we are manipulating in memory
We are doing it directly in RAM
Here we are using registers
Here we are using register to register instructions more
Although load and store will be used by default
Because you will load data from memory
And you will store the final result
So here load and store is mainly used
Related to memory
But here the proper utilization of memory is there
Most of the work we are performing in memory
Then this micro programmed control unit is based
And this is hardwired control unit based
Control unit that generates signals
If you want to fetch, decode, execute any instruction
All this work is to generate signals of control unit
So this is micro programmed based
In which we can make changes
But this is hardwired
Fixed kind of environment
These are some examples that you can note
No need to remember
But mainly you can note some examples
I have written the popular architecture here
Like this Fugaku
Actually in 2020
Supercomputer
This is the example of supercomputer
So it also uses RISC system
I am finally summarizing this with a small example
So that you can get clear from the example
Let's say this is my RAM
Register set and this is my execution unit
Now see in RAM let's say my location is 2 by 2
In 2 by 2 let's say my number of rows is 4
So in 2nd row in 2nd column there is X
In 3rd row in 3rd column there is Y
Just for example I am taking
Now see what I have to do in CISC
In CISC directly use MULT instruction
What is there in 2 column 2
X is there, so take X
In column 3 what is there in 3 column 3
Y is there, so take Y
So it has to complete in one instruction
And it means in a way X is equal to X into Y
Means whatever location you read in it, take it
And directly multiply in memory
And store in the same location of memory
So when you use this instruction
Or you can say let's say you are using this code
So in assembly code, machine code
What is the number of micro instructions to do?
To do less, why?
Because this format which is more
You can say the instructions are compatible in a way
So that's why it has to produce less number of micro operations
See here we are doing the same work
First of all what will have to be done
Whatever data is in this location, it has to be brought in register
Loaded, then loaded the one in the other location
Then what we used Prode
What we did in registers
Produced A and B
And finally we stored the same value again in 2x2 location
So we are doing this whole work in 4 instructions
This is done in 1 micro instructions
So somewhere memory utilization is more here
But if we talk about today's time
RAM has become very cheap
As compared to the last 10, 20, 30 years
So that's why this system is more popular than this
So these small examples as much as you have told
These points are more than sufficient
For your college, university exam as well as competitive exam
Thank you.
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