FMS 2022 Keynote 3: YMTC

Summary

Dr. Hungbin Zhu, Vice President of Research and Development at YMTC, presents key innovations in flash memory technology, focusing on the company’s breakthrough extraction architecture. Launched in 2018, this architecture has revolutionized NAND flash memory with higher bit density, cost efficiency, and improved reliability. Dr. Zhu highlights YMTC’s achievements, including mass production capabilities, advanced I/O speeds, and collaborations with industry partners. The third-generation extraction platform introduces a simplified process, reducing costs and increasing performance, positioning YMTC to lead in the evolving semiconductor market. The company’s commitment to continuous innovation promises to shape the future of memory technology.

Takeaways

• 😀 Dr. Hungbin Zhu introduced the advancements in YMTC's extraction architecture, which was first introduced by CEO Simon in 2018.
• 😀 The extraction platform offers higher bit density and better cell efficiency compared to traditional NAND flash products at the same technology node.
• 😀 YMTC's extraction-based products are mass production capable, cost-competitive, and reliable, with millions of units already shipped to customers across various industries.
• 😀 The extraction platform's technology features face-to-face bonding, which saves 5% of area compared to traditional true array contacts, leading to cost and efficiency benefits.
• 😀 YMTC's third-generation extraction products incorporate a new architecture called *backside source connector* (BSSC), simplifying the production process and improving yield.
• 😀 The third generation of extraction technology enables higher I/O speed (up to 2.4 Gbps) and significantly improved array performance, contributing to better overall product efficiency.
• 😀 YMTC has focused heavily on collaboration with suppliers and partners in areas such as materials, processes, packaging, and testing, creating mutual benefits and accelerating technological development.
• 😀 Through partnerships, YMTC has developed low-cost, high-speed SSDs without DRAM, reducing power consumption by 25% and lowering costs for partners.
• 😀 Dr. Zhu emphasized that the extraction architecture allows for more flexible CMOS design, addressing the growing need for low-cost solutions with higher I/O speeds and bit density.
• 😀 YMTC's third-generation products, such as the X3 90 TLC, are designed with optimized cell area efficiency and reduced CMOS size, contributing to both low cost and high performance.
• 😀 Dr. Zhu concluded that YMTC's extraction platform, with its proven reliability and scalability, will continue to meet the industry's growing demand for flash memory and pave the way for future innovations.

Q & A

What is the main topic of Dr. Hungbin Zhu's keynote presentation?

The main topic of Dr. Hungbin Zhu's keynote is 'Extracting Architecture as a Platform for NAND Flash Innovations,' focusing on the achievements, breakthroughs, and future prospects of the extraction-based architecture in NAND flash memory products.

What is the significance of the extraction-based architecture introduced by YMTT in 2018?

The extraction-based architecture, introduced by YMTT in 2018, brought a new level of efficiency and high bit density to NAND flash products, which has since become widely accepted in the industry. It enables higher cell efficiency and cost-competitive production while maintaining high performance and reliability.

How has YMTT demonstrated the reliability of its extraction-based products?

YMTT has shipped millions of units with its extraction-based products over the past four years, receiving positive feedback from customers about their quality and reliability. Additionally, the lab data shows that these products exceed industry reliability standards.

What are some key innovations introduced in the third generation of extraction-based products?

The third generation of extraction-based products introduced a new architecture called 'backside source connector' (PSSC), which simplifies the process flow and reduces costs. This innovation has already led to smooth yield ramps and quick transitions to mass production, enhancing array performance and I/O speed.

What advantages does the backside source connector (PSSC) provide?

The backside source connector (PSSC) eliminates some of the most challenging processes in dual-deck 3D NAND, providing a simplified process flow, lower costs, and improved yield ramps. This design innovation has significantly reduced production complexity and time-to-market.

What performance improvements can be expected with YMTT's X3 90 TLC product?

The X3 90 TLC product offers significant upgrades in array performance, I/O speed, and bit density. It achieves an I/O speed of 2.4 gigabits per second, with the potential to reach 3.0 gigabits per second, and it offers higher bit density than mainstream products for 1TB storage.

How does YMTT address the challenges associated with increasing tier numbers in NAND flash production?

YMTT addresses the challenge of increasing tier numbers by providing flexibility in CMOS design, which allows for the production of low-cost CMOS that can meet the I/O requirements. The extraction architecture also offers more possibilities for wafer operations, improving cost structures.

What is the role of collaboration in YMTT's success with the extraction platform?

Collaboration plays a crucial role in YMTT's success. The company has partnered with suppliers, packaging partners, and testers to innovate and create new solutions, including high-speed testers and packaging designs. This collaboration has helped YMTT shorten development cycles and improve product performance and cost-efficiency.

What are some of the key benefits of the collaboration between YMTT and its suppliers?

The collaboration with suppliers has led to mutual benefits such as the development of new materials, processes, and equipment. This has resulted in several world-first technologies and allowed suppliers to refine their hardware and equipment to better support YMTT’s R&D efforts.

What future challenges does Dr. Zhu highlight for the NAND flash industry?

Dr. Zhu highlights two main challenges: first, the increasing complexity of designing CMOS with smaller sizes to match increasing tier numbers and I/O requirements, and second, the rising costs of the process, which need to be controlled for future scalability. These challenges must be resolved to maintain profitability as the industry advances.